Power factor correction circuit

ABSTRACT

A power factor correction circuit comprises first and second ac inputs (I 1 ), (I 2 ) for receiving an ac voltage. A rectifier ( 104 ) has first and second rectifier inputs (I 3 ), (I 4 ) each connected to a respective ac input (I 1 ), (I 2 ), and first and second rectifier outputs ( 05 ), ( 06 ) for outputting a dc voltage. Two capacitor banks (C 1 ), (C 2 ) are connected in series between the rectifier outputs ( 05 ), ( 06 ). A choke (L 1 ) is connected between ac input (I 1 ) and rectifier input (I 3 ). A bi-directional switch ( 106 ) is connected to the rectifier inputs (I 3 ), (I 4 ) and receives a control signal for controlling the switching of the bi-directional switch ( 106 ) so as to control the charging and discharging of the choke (L 1 ) through the rectifier ( 104 ). A mid-point between the capacitor banks (C 1 ), (C 2 ) is selectively connectable, or connected, to the ac input (I 2 ) according to the magnitude of the ac voltage.

The invention relates to a power factor correction circuit.

Universal voltage power factor performance is required in the design ofmany new products. A known power factor correction (PFC) circuit isdescribed in U.S. Pat. No. 4,677,366. With reference to FIG. 1, thispower factor correction (PFC) circuit 10 includes a bridge rectifier 12,consisting of diodes D1, D2, D3 and D4, which converts a mains acvoltage received from ac source 14 into a positive sinusoidal voltage.This voltage is fed by the rectifier 12 to a dc booster converter 16consisting of choke L1, semiconductor switch or MOSFET M1, and a fasterreverse recovery diode D5. In operation, a varying gating signal isapplied to switch M1. When switch M1 is switched on by the gatingsignal, a current pulse flows through choke L1 and switch M1, therebycharging choke L1. When switch M1 is switched off by the gating signal,the current pulse continues to flow through choke L1 for a period oftime determined by the values of the choke L1 and capacitor bank C1. Asswitch M1 is switched off, current flows through diode D5 and intocapacitor bank C1, which stores the energy of the periodic pulses ofcurrent to convert the pulsation dc current into a smooth dc voltage fora load 18. By varying the duty ratio of the switch M1, the pulses ofcurrent through choke L1 can shape the choke current into a sinusoidalwaveform in phase with the mains ac voltage, thereby maintaining a powerfactor of 1.

The maximum r.m.s choke current, I_(choke) _(—) _(max) _(—) _(dc), maybe estimated fromI _(choke) _(—) _(max) _(—) _(dc) =P _(o)/(ηV _(in) _(—) _(min))  EQU(1)where V_(o) is the output voltage (for example, 400V), which for thiscircuit is the same as the voltage V_(C1) output from the capacitor bankC1, P_(o) is the output power rating, for example 1 kW, V_(in) _(—)_(min) is the minimum voltage (typically 90V) of the mains voltage,V_(in), and η is the dc booster efficiency, generally about 0.95.

In order to maintain the output voltage at the required level, theaverage duty ratio, D_(dc), of switch M1 is selected according toequation (2) below.D _(dc)=(V _(o) −V _(in))/V _(o)  EQU (2)

Thus, the maximum average duty ratio D_(max) occurs at the lowest mainsinput voltage; when V_(o)=400V and V_(in)=V_(in) _(—) _(min)=90V, D_(dc)_(—) _(max)=0.775.

The choke rated inductance is determined from the duty ratio, inputmains voltage, switch frequency f_(s) and desired ripple current I_(rip)(resulting from the flow of energy into and out from the capacitor bankC1) as shown in EQU (3), in which the desired ripple current is 20% ofI_(choke) _(—) _(max) _(—) _(dc).L _(choke) _(—) _(dc) =D _(dc) V _(in)/(0.2f _(s) *I _(choke) _(—)_(max) _(—) _(dc))  EQU (3)

L_(choke) _(—) _(dc) reaches a maximum, L_(choke) _(—) _(max) _(—)_(dc), when V_(in) is 50% of V_(o). To maintain the desired ripplecurrent, the rated inductance of the choke L1 has to be L_(choke) _(—)_(max) _(—) _(dc).

When the switch frequency and choke inductance have been set, the mainsripple current is proportional to the duty ratio and input mains voltageacross the choke, when M1 is turned on, as shown in EQU (4).I _(rip) =D _(dc) V _(in)/(f _(s) *L _(choke) _(—) _(max) _(—)_(dc))  EQU (4)

The ripple current also reaches the maximum value when input mainsvoltage V_(in), is half of the output voltage Vo.

The minimum r.m.s current of switch M1 is given by equation (5).I _(rated) _(—) _(M1)=√{square root over (0.7+0.3D _(dc) _(—) _(max))}I_(choke) _(—) _(max) _(—) _(dc)  EQU (5)

There are a number of problems associated with such a PFC circuit Forinstance, it is clear from the above equations that the booster chokesize, the semiconductor switch current, and the mains ripple current arerelated to the minimum mains voltage. With a low minimum mains voltageof around 90V, the resultant large mains ripple current results in arelatively large EMC filter requirement and high insertion loss to meetEMC criteria, with the resultant large switch current increasing powerloss in the switch M1. As the diodes D1 to D4 of the rectifier 12 are inthe choke charge and discharge paths, there are power losses on threedevices (D1, D4 and D5, or D2, D3 and D5) at any given time, which willgenerate a relatively large amount of heat requiring dissipation using aheat sink or the like. Furthermore, the average duty ratio at lowvoltage input is relatively high, and causes relatively large powerlosses in the switch M1.

With reference to FIG. 2, U.S. Pat. No. 6,411,535 describes a PFCcircuit 30 which seeks to increase circuit efficiency by reducing thenumber of diodes in the choke paths. This PFC circuit 30 is of a doublebooster variation without an explicit full bridge rectifier. When themains is in positive half cycle, i.e. the voltage at input I1 is higherthan at input I2, a booster consisting of choke L1, switch M1 and diodeD3 is operated to convert the ac power to dc power. Using gating signal1, firstly M1 is turned on to charge the chokes L1 and L2 via diode Dm2.Then M1 is turned off, which results in the chokes L1 and L2 inducing,via diodes D3 and Dm2, a higher voltage and charge in the capacitor C1.When the mains is in negative half cycle, that is the voltage at I1 islower than at I2, a booster consisting of choke L2, switch M2 and diodeD4 is operated to convert the ac power to dc power. Using gating signal2, M2 is turned on to charge the chokes L1 and L2 via Dm1. When M2 isturned off, the chokes L2 and L1 induce higher voltages and charge thecapacitor C1 via diodes D4 and Dm1.

The above equations (1) to (4) are equally applicable to this circuit.In contrast, the r.m.s current ratings of switches M1 and M2 in FIG. 2are 70% of that given by equation (5), as these switches conduct foronly half of the period of the mains cycle. There are only two devicesin the conducting paths so the power losses associated with this PFCcircuit are lower than those of the PFC circuit of FIG. 1. However, thechoke size, inductance and mains ripple current cannot be reduced.

With reference to FIG. 3, the article entitled “Comparative study ofpower factor correction converters for single phase half-bridgeinverters” by Su et al. in the Proceedings of the Power ElectronicsSpecialist Conference 2001 discusses a half bridge booster PFC circuit40, the topological structure of which is changed depending on the levelof the mains input. When the mains input is higher than 150V, thevoltage selector switch S1 is open. In the mains positive half cycle,when the voltage at I1 is higher than that at I2, using the gatingsignal 1 switch M1 is first turned on, to charge the choke Lchoke viadiode D3, and subsequently turned off, so that the choke induces a highvoltage which charges the serially connected capacitor banks C1 and C2and supplies power to the load via diodes Dm2 and D3. At the negativehalf cycle, using the gating signal 2 switch M2 is first turned on, tocharge the choke via diode D4, and subsequently turned off, so that thechoke induces a high voltage in another direction to charge thecapacitor banks C1 and C2 via diodes D4 and Dm1 and supply power to theload. Thus, when M1 or M2 is turned on, there is no power transfer fromthe mains to the load and the capacitor C1 and C2 supply power to theload.

When the mains voltage is lower than 150V, the voltage selector switchS1 is closed, changing the half bridge booster into a voltage doublerPFC circuit. As a result, only one of the capacitor banks C1 and C2 ischarged in each mains half cycle. In the positive half cycle, M1 isturned on to charge the choke via diode D3. However, this will causecapacitor bank C2 to discharge via switch S1, the mains, choke andswitch M1. When the M1 is subsequently turned off, the choke generates ahigh voltage to charge the capacitor bank C1 and supply power to theload. In the negative half cycle, using gating signal 2 switch M2 isfirst turned on to charge the choke via diode D4. However, this willcause capacitor bank C1 to discharge via switch M2, the choke, the mainsand switch S1. When switch M2 is subsequently turned off, the choke L1produces a high voltage, which charges the capacitor banks C2 via diodeDm1 and supplies power to the load.

Obviously, this voltage doubler circuit has a serious drawback in viewof the capacitor banks alternately discharging energy back to the mains.To overcome this problem, this article proposed the PFC circuit 50 shownin FIG. 4, which is a form of single switch voltage doubler booster PFCcircuit. In the circuit 50, there are two extra diodes D5, D6 in the dclink to prevent the capacitor discharge problem in the half bridgevoltage doubler topology of circuit 40 structure.

When the mains voltage is lower than 150V, switch S1 is closed. In thepositive half cycle, switch M1 is turned on to let the mains charge thechoke L1 via diodes D1 and D4. As the discharge path of capacitor C2(via switch S1, the mains, choke L1 and switch M1) is blocked by diodeD6, the capacitor bank C2 can only discharge to the load. When switch M1is turned off, the induced high voltage on choke L1 charges thecapacitor bank C1 via D1, D5, and S1 and supplies power to the load. Atthe negative half cycle, switch M1 is first turned on to charge thechoke L1 via diodes D3 and D2. As the discharge path of capacitor bankC1 (via M1, choke L1, the mains and S1) is blocked by diode D5, C1discharges its stored energy to the load. When M1 is subsequently turnedoff, the induced high voltage on the choke L1 charges the capacitor bankC2 via S1, D6 and D2 and supplies power to the load.

When the mains input is higher than 150V, the voltage selector switch S1is open. As a result, the circuit operates in a similar manner to the dcbooster circuit 10 of FIG. 1, with the exception that there is one morediode in the negative dc rail, which increases the voltage drop andpower loss of the circuit.

It is an object of at least the preferred embodiment of the presentinvention to solve these and other problems.

In a first aspect, the present invention provides a power factorcorrection circuit, comprising first and second ac inputs for receivingan ac voltage; rectifying means connected to at least one of the acinputs; energy storage means connected in parallel across the rectifyingmeans; inductor means connected between one of the ac inputs and therectifying means; and bi-directional switch means connected to therectifying means and having means for receiving control signals forcontrolling the switching thereof so as to control the charging anddischarging of the inductor means through the rectifying means.

Preferably, the energy storage means comprises first capacitive meansconnected at one end thereof to the rectifying means and secondcapacitive means connected at one end thereof to the other end of thefirst capacitive means and at the other end thereof to the rectifyingmeans, said other end of the first capacitive means being selectivelyconnectable or connected to one of the ac inputs.

The circuit preferably comprises a voltage selector switch connectedbetween said other end of the first capacitive means and the second acinput. In one arrangement the voltage selector switch is connected tothe rectifying means. Preferably, the voltage selector switch comprisesmeans for receiving a signal indicative of the magnitude of the acvoltage to control the switching of the voltage selector switch.

Preferably, the inductor means comprises a first inductor connectedbetween the first ac input and a first rectifier input, and, optionally,a second inductor connected between the second ac input and a secondrectifier input.

In one arrangement, the bi-directional switch comprises a first fieldeffect transistor or Insulated Gate Bipolar Transistor and a secondfield effect transistor or Insulated Gate Bipolar Transistor, the gatesof the first and second transistors being arranged to receive thecontrol signals, the source/emitter of the first transistor beingconnected to the source/emitter of the second transistor, thedrain/collector of the first transistor being connected to the first acinput, and the drain/collector of the second transistor being connectedto the second ac input.

In an alternative arrangement, the bi-directional switch comprises afirst field effect transistor or Insulated Gate Bipolar Transistor and asecond field effect transistor or Insulated Gate Bipolar Transistor, thegates of the first and second transistors being arranged to receive thecontrol signals, the drain/collector of the first transistor beingconnected to the drain/collector of the second transistor, thesource/emitter of the first transistor being connected to the first acinput, and the source/emitter of the second transistor being connectedto the second ac input.

Where the bi-directional switch comprises bipolar transistors, thebi-directional switch preferably also comprises a first diode connectedat one end thereof to the collector of the first bipolar transistor andat the other-end-thereof-to the emitter of the first bipolar transistor,and a second diode connected at one end thereof to the collector of thesecond bipolar transistor and at the other end thereof to the emitter ofthe second bipolar transistor.

In a second aspect, the present invention provides a power factorcorrection circuit, comprising first and second ac inputs for receivingan ac voltage; rectifying means having first and second rectifier inputseach connected to a respective ac input, and first and second rectifieroutputs for outputting a dc voltage; energy storage means connectedbetween the rectifier outputs; inductor means connected between one ofthe ac inputs and a corresponding one of the rectifier inputs; andbi-directional switch means connected to the first and second rectifierinputs and having means for receiving control signals for controllingthe switching thereof so as to control the charging and discharging ofthe inductor means through the rectifying means.

In a third aspect, the present invention provides a method of providingdirect current power to a load from an alternating current power source,the method comprising the steps of providing a circuit asaforementioned, connecting the ac inputs to the power source, andcontrolling the switching of the bi-directional switch means accordingto the magnitude of the ac voltage output from the power source, forexample, according to the r.m.s. current flowing through the inductormeans.

Preferred features of the present invention will now be described, byway of example only, with reference to the accompanying drawings, inwhich:

FIG. 1 illustrates a known dc booster PFC circuit;

FIG. 2 illustrates a known twin ac booster PFC circuit;

FIG. 3 illustrates a known half bridge ac booster PFC circuit;

FIG. 4 illustrates a known full bridge, single switch ac booster PFCcircuit;

FIG. 5 illustrates an embodiment of a PFC circuit;

FIG. 6 illustrates the topology of the circuit of FIG. 5 with switch S1open;

FIG. 7 illustrates the topology of the circuit of FIG. 5 with switch S1closed;

FIG. 8 is a graph illustrating the variation of average duty ratio withinput ac voltage for the PFC circuits of FIGS. 1 and 5;

FIG. 9 is a graph illustrating the variation of choke inductance withinput ac voltage for the PFC circuits of FIGS. 1 and 5;

FIG. 10 is a graph illustrating the variation of mains ripple currentwith input ac voltage for the PFC circuits of FIGS. 1 and 5;

FIG. 11 illustrates an alternative topology of the circuit of FIG. 5with switch S1 closed; and

FIGS. 12(a) to 12(f) illustrate various alternative configurations ofthe bi-directional switch of the circuit of FIG. 5.

With reference to FIG. 5, a PFC circuit 100 comprises first and secondac inputs I1, I2 for receiving an ac voltage from ac source 102. Aninductor, or choke, L1 is connected at one end thereof to ac input I1and at the other end thereof to a first input I3 of rectifier 104.Optionally, as indicated in FIG. 5, a second inductor, or choke, L2 maybe connected at one end thereof to ac input 12 and to a second input I4of rectifier 104. The rectifier 104 consists of a first diode D1connected between the first rectifier input I3 and a first rectifieroutput O5, a second diode D2 connected between second rectifier outputO6 and the first rectifier input I3, a third diode D3 connected betweenthe second rectifier input I4 and the first rectifier output O5, and afourth diode D4 connected between the second rectifier output O6 and thesecond rectifier input I4.

The PFC circuit also comprises a bi-directional switch 106 connected tothe first and second rectifier inputs I3, I4. In the embodiment shown inFIG. 5, the bi-directional switch comprises two back-to back switchesM1, preferably in the form of a first field effect transistor, orMOSFET, M1 and a second field effect transistor, or MOSFET, M2. Thegates of MOSFETS M1, M2 are arranged to receive a gating control signalapplied between switch inputs I7, I8. As discussed below, in thispreferred embodiment the gating signal controls the switching of thebi-directional switch 106 according to the magnitude of the mains acvoltage, an indication of which may be provided by the choke currentI_(choke). The source of MOSFET M1 is connected to the source of MOSFETM2. The drain of MOSFET M1 is connected to the first rectifier input I3,and thus to the first ac input I1, and the drain of MOSFET M2 isconnected to the second rectifier input I4, and thus to second ac inputI2. In the illustrated embodiment, the bi-directional switch 106includes a first diode Dm1 connected between the source and drain ofMOSFET M1, and a second diode Dm2 connected between the source and drainof MOSFET M2. It is to be noted that the diodes Dm1 and Dm2 are the bodydiodes of transistors M1 and M2, and not physically separate diodes.However, such diodes are required if the bi-directional switch isimplemented using other components, such as Insulated Gate BipolarTransistors (IGBTs)

The circuit 100 also comprises an energy store 108 connected between thefirst and second rectifier outputs O5, O6. In the illustratedembodiment, the energy store 108 consists of a first capacitor, orcapacitor bank, C1 and a second capacitor, or capacitor bank, C2, thefirst and second capacitors C1, C2 being serially connected via terminalT9.

Terminal T9 is connected to the second rectifier input I4 via a switchS1. Preferably, switch S1 is a voltage selector switch having first andsecond switch inputs I10, I11 for receiving therebetween a signalindicative of the magnitude of the mains ac voltage received by inputsI1, I2, the magnitude of the signal input to inputs I10, I11 controllingthe opening and closing of the path between terminal T9 and rectifierinput I4. Alternatively, the switch S1 may be a manually operableswitch, or any other suitable form of switch.

The PFC circuit topology and the operational principles of the PFCcircuit 100 change with the opening and closing of the switch S1. At ahigher mains input (in the range, say, from 180V to 265V), switch S1 isopened, and the resulting equivalent circuit, as shown in FIG. 6, is inthe form of a full bridge ac booster PFC circuit. At lower mains input(in the range, say, from 90V to 150V), switch S1 is closed and theresulting equivalent circuit, as shown in FIG. 7, is in the form of ahalf bridge voltage doubler PFC circuit. The modes of operation of thesetwo circuits are discussed separately below.

High Voltage Operation Mode

With reference to FIG. 6, during positive half cycle of the mains acvoltage, where the voltage at I1 is higher than that at I2, a suitablegating signal is applied between inputs I7, I8 to “switch on” thebi-directional switch 106, that is, by rendering MOSFET M1 conductive,to connect the choke L1 (and optional choke L2) to the mains via diodeDm2. The choke current I_(choke) linearly increases in proportion to themagnitude of the mains voltage. When I_(choke), reaches a predeterminedlevel, the gate signal is changed to “switch off” the bi-directionalswitch, by rendering MOSFET M1 non-conductive. The large voltage inducedacross the choke L1, by the subsequent rapid decay of the choke current,is superimposed on the mains voltage, which both charges the energystore 108, in this case consisting of the serially connected capacitorsC1 and C2, and supplies power to the load, indicates by Rload in FIGS. 5to 7, via diodes D1 and D4.

At negative half cycle of the mains input voltage, where the voltage atI2 is higher than that at I1, a suitable gating signal is appliedbetween inputs I7, I8 to “switch on” the bi-directional switch 106, thatis, by rendering MOSFET M2 conductive, to connect the choke L1 (andoptional choke L2) to the mains via diode Dm1. Again, the choke currentI_(choke) linearly increases in proportion to the magnitude of the mainsvoltage. When I_(choke), reaches a predetermined level, the gate signalis changed to “switch off” the bi-directional switch, by renderingMOSFET M2 non-conductive. The large voltage induced across the choke L1,by the subsequent rapid decay of the choke current, is superimposed onthe mains voltage, which both charges the energy store 108 and suppliespower to the load via diodes D3 and D2.

For the circuit illustrated in FIG. 6, the maximum choke current,I_(choke) _(—) _(max) _(—) _(ac), may be estimated fromI _(choke) _(—) _(max) _(—) _(ac) =P _(o)/(ηV _(in) _(—) _(min1))  EQU(6)where P_(o) and η have the same meaning as in equation (1), and V_(in)_(—) _(min1) is the minimum voltage (typically 180V) of the mainsvoltage, V_(in), in this high voltage operational mode.

The average duty cycle D_(ac), is selected according to the equation (7)below.D _(ac)=(V _(o) −V _(in))/V _(o)  EQU (7)where V_(o) is the output voltage, which is also the same as the voltageV_(C1+C2) output from the serially connected capacitors C1 and C2. Atthe lowest mains input voltage, when V_(in)=V_(in) _(—) _(min1)=180V,and when V_(o)=400V, D_(ac) _(—) _(max)=0.55.

The choke rated inductance L_(choke) _(—) _(ac) is determined from theduty ratio, input mains voltage, switch frequency f_(s) and desiredripple current I_(rip) (resulting from the flow of energy into and outfrom the serially connected capacitors C1 and C2) as shown in EQU (8),in which the desired ripple current is 20% of I_(choke) _(—) _(max) _(—)_(ac).L _(choke) _(—) _(ac) =D _(ac) V _(in)/(0.2f _(s) *I _(choke) _(—)_(max) _(—) _(ac))  EQU (8)

L_(choke) _(—) _(ac) reaches a maximum, L_(choke) _(—) _(max) _(—)_(ac), when V_(in) is 50% of V_(o). To maintain the desired ripplecurrent, the rated inductance of the choke L1 (or, optionally L1+L2) hasto be L_(choke) _(—) _(max) _(—) _(ac).

When the switch frequency and choke inductance have been set, the mainsripple current is proportional to the duty ratio and input mains voltageacross the choke L1, when the bi-directional switch 106 is turned on, asshown in EQU (9).I _(rip) =D _(ac) V _(in)/(f _(s) *L _(choke) _(—) _(max) _(—)_(ac))  EQU (9)

The ripple current also reaches the maximum value when input mainsvoltage V_(in) is half of the output voltage Vo.

The minimum r.m.s current of MOSFETs M1 and M2 is given by equation(10).I _(rated) _(—) _(M) =√{square root over (0.7+0.3D _(ac) _(—max) )} I_(choke) _(—) _(max) _(—) _(ac)/√{square root over (2)}  EQU (10)

Returning to FIG. 6, during both positive and negative half cycles thereis only ever one diode (Dm1 or Dm2) in the charge path of the choke L1(and optional choke L2), and two diodes (D1 and D4, or D3 and D2) in thechoke discharge path. This is the same as in the prior art circuitsdescribed in with reference to FIGS. 2 and 3. In contrast, in the priorart circuit described with reference to FIG. 1 there are always twodiodes in the choke charges path, and three diodes in the chokedischarge path. Furthermore, in the prior art circuit described withreference to FIG. 4, there are always two diodes in the choke chargepath and, in high voltage operational mode, four diodes in the chokedischarge path. Thus, in high voltage operational mode, the PFC circuit100 has smaller power losses associated therewith than the prior artcircuits illustrated in FIGS. 1 and 4.

Low Voltage Operation Mode

With reference to FIG. 7, during positive half cycle of the mains acvoltage, where the voltage at I1 is higher than that at I2, a suitablegating signal is applied between inputs I7, I8 to “switch on” thebi-directional switch 106, that is, by rendering MOSFET M1 conductive,to connect the choke L1 (and optional choke L2) to the mains via diodeDm2. The choke current I_(choke) linearly increases in proportion to thesize of the mains voltage. When I_(choke), reaches a predeterminedlevel, the gate signal is changed to “switch off” the bi-directionalswitch, by rendering MOSFET M1 non-conductive. The large voltage inducedacross the choke L1, by the subsequent rapid decay of the choke current,is superimposed on the mains voltage, which both charges the capacitorbank C1, and supplies power to the load through capacitor bank C2. Theconduction path is from I1 to I3 via L1, then to O5 via diode D1, thento T9 through both C1 and Rload (via C2), then to I4 through the closedswitch S1, and finally back to I1 via I2 (and optionally L2) and themains.

During negative half cycle of the mains ac voltage, where the voltage atI2 is higher than that at I1, a suitable gating signal is appliedbetween inputs I7, I8 to “switch on” the bi-directional switch 106, thatis, by rendering MOSFET M2 conductive, to connect the choke L1 (andoptional choke L2) to the mains via diode Dm1. The choke currentI_(choke) linearly increases in proportion to the magnitude of the mainsvoltage. When I_(choke), reaches a predetermined level, the gate signalis changed to “switch off” the bi-directional switch, by renderingMOSFET M2 non-conductive. The large voltage induced across the choke L1,by the subsequent rapid decay of the choke current, is superimposed onthe mains voltage, which both charges the capacitor bank C2, andsupplies power to the load through capacitor bank C1. The conductionpath is from I2 to I4 (optionally via L2), then to T9 through the closedswitch S1, then to O6 through both C2 and Rload (via C1), then to I3 viadiode D2, and finally back to I2 via I1, L1 and the mains.

For the circuit illustrated in FIG. 7, the maximum choke current,I_(choke) _(—) _(max) _(—) _(dv), may be estimated fromI _(choke) _(—) _(max) _(—) _(dv) =P _(o)/(ηV _(in) _(—) _(min2))  EQU(11)where P_(o) and η have the same meaning as in equation (1), and V_(in)_(—) _(min2) is the minimum voltage (typically 90V) of the mainsvoltage, V_(in), in this low voltage operational mode.

The average duty cycle D_(dv), is selected according to the equation(12) below.D _(dv)=(V _(C) −V _(in))/V _(C)  EQU (12)as V_(o), the output voltage, in this circuit is twice the outputvoltage V_(C) from each of the capacitors C1 and C2. At the lowest mainsinput voltage, when V_(in)=V_(in) _(—) _(min2)=90V, and when V_(c)=200V,D_(dv) _(—) _(max)=0.55.

The choke rated inductance L_(choke) _(—) _(dv) is determined from theduty ratio, input mains voltage, switch frequency f_(s) and desiredripple current I_(rip) (resulting from the flow of energy into and outfrom the capacitors C1 and C2) as shown in EQU (13), in which thedesired ripple current is 20% of I_(choke) _(—) _(max) _(—) _(dv).L _(choke) _(—) _(dv) =D _(dv) V _(in)/(0.2f _(s) *I _(choke) _(—)_(max) _(—) _(dv))  EQU (13)

L_(choke) _(—) _(dv) reaches a maximum, L_(choke) _(—) _(max) _(—)_(dv), when V_(in) is 50% of V_(C). To maintain the desired ripplecurrent, the rated inductance of the choke L1 (or, optionally L1+L2) hasto be L_(choke) _(—) _(max) _(—) _(dv).

When the switch frequency and choke inductance have been set, the mainsripple current is proportional to the duty ratio and input mains voltageacross the choke, when the bi-directional switch 106 is turned on, asshown in EQU (14).I _(rip) =D _(dv) V _(in)/(f _(s) *L _(choke) _(—) _(max) _(—)_(dv))  EQU (14)

The ripple current also reaches the maximum value when input mainsvoltage V_(in) is half of V_(C).

The minimum r.m.s current of MOSFETs M1 and M2 is given by equation(15).I _(rated) _(—) _(M) =√{square root over (0.7+0.3Ddv _(—max))} I_(choke) _(—) _(max) _(—) _(dv)/√{square root over (2)}  EQU (15)

Thus, in comparison to the prior art circuits described with referenceto FIG. 1 and 2 (when operated in the low voltage range), the PFCcircuit 100, when operating in the lower voltage range, has a number ofadvantages. First, the PFC circuit 100 has a smaller average duty ratio(see FIG. 8) over a range of values of V_(in), which eases the dynamicresponse requirement on the control system. Secondly, the PFC circuit100 enables the choke inductances to be reduced (see FIG. 9), leading toa smaller choke size and lower costs. Additionally, the PFC circuit 100has a smaller mains ripple current (see FIG. 10) over a range of valuesof V_(in), which reduces the high frequency harmonic current, conductiveemission pollution and MOSFET current rating to nearly 50%. These leadto a smaller EMC filter size, lower insertion losses and attenuation,and lower MOSFET conduction and switch losses due to the smaller dutyratio and ripple current.

Furthermore, during both positive and negative half cycles, there isonly ever one diode (Dm1 or Dm2) in the charge path of the choke L1 (andoptional choke L2) and one diode (D1 or D2) in the choke discharge path.There are also no problems associated with unwanted capacitor discharge,unlike the prior art circuit described with reference to FIG. 3. Whenthe prior art circuit described with reference to FIG. 4 is operated involtage doubler mode, there are two diodes in both the choke charge anddischarge paths, and thus in low voltage operational mode, again the PFCcircuit 100 has smaller power losses associated therewith than the priorart circuits illustrated in FIGS. 1 and 4. As a result, the systemthermal management requirement is less demanding, and so smaller heatsinks or fans are required.

These advantages enable the PFC circuit 100 to offer a sustainable wideroutput voltage range than the PFC circuits illustrated in FIGS. 1, 2 and3, and to boost a higher output power with the same semiconductor switchdevice rating as these three known PFC circuits, especially in the lowervoltage input range. The PFC circuit 100 can maintain a uniform outputpower rating in the wide single phase universal voltage range withoutincurring additional costs. In turn, these can offer the opportunity tobuild larger power PFC equipment using a smaller rating, economicaldevice. The PFC 100 circuit could be switched at lower frequency; about30% lower, at a lower mains input without deteriorating the powerfactor, harmonics and emission performance. This can further improve theoverall system efficiency and running cost.

Furthermore, the prior art circuit shown in FIG. 1 has notorious thermalrunaway problems when operated in the lower mains input voltage becauseof the relatively large input current, larger conducting duty ratio andhigher boost voltage ratio. These problems are greatly relieved orovercome in the PFC circuit 100.

The electrolytic capacitor in dc link is the weakest part in a systemlife span. Using two lower voltage, double capacitance capacitors toreplace a single higher voltage capacitor will extend the system lifetime. The high frequency PFC choke is the most expansive, bulky andimportant passive part in all PFC circuits, and its life time is greatlyeffected by the mains ripple current, as a larger ripple current causesmore copper and iron losses and increases temperature rise. The PFC 100reduces the mains ripple nearly 50% and thus reduces power losses on thechoke and extends its useful life time. For the prior art circuitsillustrated in FIGS. 1, 2 and 3, the most worst operation condition isat the lowest mains input voltage, in which high voltage, current andthermal stresses on a single switch and diode device causes greaterreliability and performance concerns. These concerns are greatlyrelieved by the change of circuit topology in the PFC circuit 100 and asresult reliability and performance are improved.

It is to be understood that the foregoing represents one embodiment ofthe invention, others of which will no doubt occur to the skilledaddressee without departing from the true scope of the invention asdefined by the claims appended hereto.

For example, with reference to the circuit topology described above withreference to FIG. 7, the diodes D3 and D4 form no part of various chargeand discharge paths of the circuit. Therefore, as illustrated in FIG. 11it is possible for these diodes to be omitted altogether from the PFCcircuit when the mains ac voltage is in the lower voltage range.

In the circuit illustrated in FIGS. 5 to 7, the bi-directional switch106 is embodied by an N MOSFET common source bi-directional switch, asalso illustrated in FIG. 12(a). However, the bi-directional switch 106could be replaced by any of the bi-directional switches 106 a to 106 eillustrated in FIGS. 12(b) to 12(f). FIG. 12(b) illustrates an N MOSFETcommon drain bi-directional switch 106 a, FIG. 12(c) illustrates an IGBTcommon emitter bi-directional switch 106 b, FIG. 12(d) illustrates anIGBT common collector bi-directional switch 106 c, FIG. 12(e)illustrates a P MOSFET common source bi-directional switch 106 d, andFIG. 12(f) illustrates a P MOSFET common drain bi-directional switch 106e. The operation of these switches is well known to the skilledaddressee, and will not be explained further here. Other suitablebi-directional switches, such as a full diode bridge type bi-directionalswitch, will be readily apparent to the skilled addressee.

In summary, a power factor correction circuit comprises first and secondac inputs I1, I2 for receiving an ac voltage. A rectifier 104 has firstand second rectifier inputs I3, I4 each connected to a respective acinput I1, I2, and first and second rectifier outputs O5, O6 foroutputting a dc voltage. Two capacitor banks C1, C2 are connected inseries between the rectifier outputs O5, O6. A choke L1 is connectedbetween ac input I1 and rectifier input I3. A bi-directional switch 106is connected to the rectifier inputs I3, I4 and receives a controlsignal for controlling the switching of the bi-directional switch 106 soas to control the charging and discharging of the choke L1 through therectifier 104. A mid-point between the two capacitor banks C1, C2 isselectively connectable to the ac input I2 according to the magnitude ofthe ac voltage.

1. A power factor correction circuit, comprising: first and second acinputs for receiving an ac voltage; rectifying means connected to atleast one of the ac inputs; energy storage means connected in parallelacross the rectifying means; inductor means connected between one of theac inputs and the rectifying means; and bi-directional switch meansconnected to the rectifying means and having means for receiving controlsignals for controlling the switching thereof so as to control thecharging and discharging of the inductor means through the rectifyingmeans, wherein the energy storage means comprises first capacitive meansconnected at one end thereof to the rectifying means and secondcapacitive means connected at one end thereof to the other end of thefirst capacitive means and at the other end thereof to the rectifyingmeans, the other end of the first capacitive means being connected orselectively connectable to one of the ac inputs.
 2. The circuitaccording to claim 1 wherein the other end of the first capacitive meansis selectively connectable to the one of the ac inputs.
 3. The circuitaccording to claim 1 comprising a voltage selector switch connectedbetween the other end of the first capacitive means and the second acinput.
 4. The circuit according to claim 3 wherein the voltage selectorswitch is connected to the rectifying means.
 5. The circuit according toclaim 3 wherein the voltage selector switch comprises means forreceiving a signal indicative of the magnitude of the ac voltage tocontrol the switching of the voltage selector switch.
 6. The circuitaccording to claim 1 wherein the inductor means comprises a firstinductor connected between the first ac input and a first rectifierinput, and optionally a second inductor connected between the second acinput and a second rectifier input.
 7. The circuit according to claim 1wherein the bi-directional switch comprises a first field effecttransistor or Insulated Gate Bipolar Transistor and a second fieldeffect transistor or Insulated Gate Bipolar Transistor, the gates of thefirst and second transistors being arranged to receive the controlsignals, the source of the first transistor being connected to thesource of the second transistor, the drain of the first transistor beingconnected to the first ac input, and the drain of the second transistorbeing connected to the second ac input.
 8. The circuit according toclaims 1 wherein the bi-directional switch comprises a first fieldeffect transistor or Insulated Gate Bipolar Transistor and a secondfield effect transistor or Insulated Gate Bipolar Transistor, the gatesof the first and second transistors being arranged to receive thecontrol signals, the drain of the first transistor being connected tothe drain of the second transistor, the source of the first transistorbeing connected to the first ac input, and the source of the secondtransistor being connected to the second ac input.
 9. The circuitaccording to claim 7 wherein the bi-directional switch comprises a firstdiode connected at one end thereof to the collector of the first bipolartransistor and at the other end thereof to the emitter of the firstbipolar transistor, and a second diode connected at one end thereof tothe collector of the second bipolar transistor and at the other endthereof to the emitter of the second bipolar transistor.
 10. A powerfactor correction circuit comprising: first and second ac inputs forreceiving an ac voltage; rectifying means having first and secondrectifier inputs each connected to a respective ac input, and first andsecond rectifier outputs for outputting a dc voltage; energy storagemeans connected between the rectifier outputs; inductor means connectedbetween one of the ac inputs and a corresponding one of the rectifierinputs; and bi-directional switch-means-connected to the first andsecond rectifier inputs and having means for receiving control signalsfor controlling the switching thereof so as to control the charging anddischarging of the inductor means through the rectifying means.
 11. Thecircuit according to claim 10 wherein the control signals forcontrolling the switching of the bi-directional switch means areindicative of the magnitude of the ac voltage.
 12. The circuit accordingto claim 11 wherein the control signals for controlling the switching ofthe bi-directional switch means are indicative of the current flowingthrough the inductor means.
 13. A method of providing direct currentpower to a load from an alternating current power source, the methodcomprising the steps of: providing a circuit comprising first and secondac inputs, a rectifying means connected to at least one of the acinputs, an energy storage means connected across the rectifying means,an inductor means connected between one of the ac inputs and therectifying means, and a bi-directional switch means connected to therectifying means and having means for receiving control signals,connecting the ac inputs to the power source; and controlling theswitching of the bi-directional switch means according to the magnitudeof the ac voltage output from the power source.
 14. The circuitaccording to claim 1 wherein the control signals for controlling theswitching of the bi-directional switch means are indicative of themagnitude of the ac voltage.
 15. The circuit according to claim 14wherein the control signals for controlling the switching of thebi-directional switch means are indicative of the current flowingthrough the inductor means.